{"id":396,"date":"2023-02-24T18:50:11","date_gmt":"2023-02-24T18:50:11","guid":{"rendered":"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/?page_id=396"},"modified":"2025-10-30T17:29:33","modified_gmt":"2025-10-30T17:29:33","slug":"publications","status":"publish","type":"page","link":"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/publications\/","title":{"rendered":"Publications"},"content":{"rendered":"<ul>\n<li><strong>SLAM: Extending the Reach of Ising Machine Advantage<\/strong>, M. Burns , Z. Azad, Y. Liu , T. Geng, H. Wu, and M. Huang, to appear in <em>IEEE Trans. Computers<\/em>, 2025<\/li>\n<li><a href=\"https:\/\/doi.org\/10.1103\/7s4v-4hs4\">General oscillator-based Ising-machine models with phase-amplitude dynamics and polynomial interactions<\/a>, L. Sun, M. Burns, and M. Huang, <em>Phys. Rev. Applied<\/em> <b>24<\/b>, 044035, Oct. 2025<\/li>\n<li>\n<p class=\"heading-lg-bold mb-2\"><a href=\"https:\/\/journals.aps.org\/prapplied\/abstract\/10.1103\/gpg9-3tjj\">Limitations in parallel Ising machine networks: Theory and practice<\/a>, M. Burns and M. Huang, <em>Phys. Rev. Applied<\/em> 24, 024045, Aug. 2025<\/p>\n<\/li>\n<li><a href=\"https:\/\/doi.org\/10.1063\/5.0254812\">A case study of scientific computing with limited precision numbers: applying rescaling and baseline shifting techniques to a spectral Vlasov-Maxwell code<\/a>, S. Cao, S. Munasinghe, M. Huang, H. Wu, Q. Lin, and C. Ren, <em>Phys. Plasmas<\/em> 32, 043903 (2025)<\/li>\n<li><a href=\"https:\/\/arxiv.org\/pdf\/2410.06397\">Provable Convergence Bounds for Hybrid Dynamical Sampling and Optimization<\/a>, M. Burns, Q. Hou, and M. Huang, <em>Proc. The International Conference on Learning Representations<\/em> (ICLR) 2025<\/li>\n<li><a href=\"https:\/\/arxiv.org\/pdf\/2408.02693\">Diff-PIC: Revolutionizing Particle-In-Cell Nuclear Fusion Simulation with Diffusion Models<\/a>, C. Liu, C. Wu, S. Cao, M. Chen, J. Liang, A. Li, M. Huang, C. Ren, Y. Wu, D. Liu, T. Geng, <em>Proc. The International Conference on Learning Representations<\/em> (ICLR) 2025<\/li>\n<li><a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=11044217\">Ising machine based on charge re-distribution<\/a>, Y. Liu, L. Sun, M. Burns, M. Huang, and H. Wu, in <em>Prof. 2025 IEEE International Symposium on Circuits and Systems<\/em>, May 2025<\/li>\n<li><a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=10993070\">Integrated Hardware Annealing based on Langevin Dynamics for Ising Machines<\/a>, Y. Liu, L. Sun, M. Huang, and H. Wu, in <em>Proc. Design, Automation and Test in Europe Conference<\/em>, Mar. 2025<\/li>\n<li><a href=\"https:\/\/www.computer.org\/csdl\/proceedings-article\/micro\/2024\/505700a105\/22nivCNbKiQ\">HyperTEE: A Decoupled TEE Architecture with Secure Enclave Management<\/a>, Y. Bai, P. Li, Y. Huang, M. Huang, S. zhao, L. Zhao, F. Zhang, D. Meng, R. Hou, <em>Proc. of the <span class=\"epub-section__title\">57<sup>th <\/sup><\/span>International Symposium on Microarchitecture<\/em>, <strong>(MICRO&#8217;24)<\/strong> Nov. 2024<\/li>\n<li><a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=10609676\">DS-GL: Advancing Graph Learning via Harnessing Nature&#8217;s Power within Scalable Dynamical Systems<\/a>, R. Song, C. Wu, C. Liu, A. Li, M. Huang, T. Geng, <em>Proc. of the 51<\/em><em><sup>st <\/sup><\/em><em style=\"font-size: inherit;\">International Symposium on Computer Architecture<\/em> <strong style=\"font-size: inherit;\">(ISCA&#8217;24)\u00a0<\/strong><span style=\"font-size: inherit;\">June 2024<\/span><\/li>\n<li><a href=\"https:\/\/openreview.net\/pdf?id=qT7DXUmX7j\">Extending Power of Nature from Binary to Real-Valued Graph Learning in Real World<\/a>, C. Wu, R. Song, C. Liu, Y. Yang, A. Li, M. Huang, T. Geng, <em>Proc. of the 12<sup>th<\/sup> International Conference on Learning Representations<\/em>, May 2024<\/li>\n<li><a href=\"https:\/\/doi.org\/10.1038\/s41598-023-49966-6\">Augmenting an electronic Ising machine to effectively solve boolean satisfiability<\/a>, A Sharma, M. Burns, A. Hahn &amp; M. Huang,\u00a0<i>Scientific Reports<\/i> <b>13<\/b>, 22858 (2023), Dec. 2023<\/li>\n<li><a href=\"https:\/\/arxiv.org\/abs\/2304.02525\">Supporting Energy-Based Learning with an Ising Machine Substrate: A Case Study on RBM<\/a>, U. Vengalam, Y. \u00a0Liu, T. Geng, H. Wu, M. Huang, in <em>Proc. <\/em><span class=\"epub-section__title\"><em>56<sup>th<\/sup> International Symposium on Microarchitecture<\/em> <strong>(MICRO&#8217;23)<\/strong>, Oct. 2023<\/span><\/li>\n<li><a href=\"https:\/\/drops.dagstuhl.de\/opus\/volltexte\/2023\/18487\/pdf\/LIPIcs-SAT-2023-25.pdf\">Combining Cubic Dynamical Solvers with Make\/Break Heuristics to Solve SAT<\/a>, A. Sharma, M. Burns, and M. Huang, in <i>Proc. of 26<sup>th<\/sup> International Conference on Theory and Applications of Satisfiability Testing (SAT)<\/i> 2023<\/li>\n<li><a href=\"https:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?arnumber=10247860\">Ising-CF: A Pathbreaking Collaborative Filtering Method Through Efficient Ising Machine Learning<\/a>, Z. Liu, Y. Yang, Z. Pan, A. Sharma, A. Hasan, C. Ding, A. Li, M. Huang, T. Geng,\u00a0<i>Proceedings of the\u00a0<\/i><i>59<sup>th<\/sup><\/i><em><i>ACM\/IEEE Design Automation Conference, <\/i><\/em>Jul. 2023<\/li>\n<li><a href=\"https:\/\/doi.org\/10.1609\/aaai.v37i8.26121\"><strong>Ising-Traffic: An Ising-based Framework for Traffic Congestion Prediction with Uncertainty<\/strong><\/a>, Z. Pan, A. Sharma, J. Hu, Z. Liu, A. Li, H. Liu, M. Huang, T. Geng, <i>Proceedings of the 37<sup>th<\/sup><\/i><em>AAAI Conference on Artificial Intelligence, <\/em>Feb. 2023<\/li>\n<li><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/isca22.pdf\">Increasing Ising Machine Capacity with Multi-Chip Architectures<\/a>, Anshujit Sharma, Richard Afoakwa, Zeljko Ignjatovic, and Michael Huang, <i>Proceedings of the 49<sup>th<\/sup> International Symposium on Computer Architecture<\/i>, Jun. 2022 <strong>(ISCA&#8217;22)<\/strong><\/li>\n<li><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/hpca22.pdf\"><b>HyBP: Hybrid Isolation-Randomization Secure Branch Predictor<\/b><\/a>, <span style=\"color: 888888;\">Lutan Zhao, Peinan Li, Rui Hou, Michael Huang, Xuehai Qian, Lixin Zhang, and Dan Meng<\/span>, <i>Proceedings of the 28<sup><small> th<\/small><\/sup> International Symposium on High-Performance Computer Architecture<\/i>, Feb. 2022 <strong>(HPCA&#8217;22)<\/strong><\/li>\n<li><a href=\"https:\/\/ieeexplore.ieee.org\/document\/9586178\"><b>A Lightweight Isolation Mechanism for Secure Branch Predictors<\/b><\/a>, <span style=\"color: 888888;\">Lutan Zhao, Peinan Li, Rui Hou, Michael Huang, Jiazhen Li, Lixin Zhang, Xuehai Qian, and Dan Meng;\u00a0<\/span><i>ACM\/IEEE Design Automation Conference<\/i> Dec, 2021 <strong>(DAC&#8217;21)<\/strong><\/li>\n<li><a href=\"https:\/\/ieeexplore.ieee.org\/document\/9099989\"><b>Exploiting Security Dependence for Conditional Speculation Against Spectre Attacks<\/b><\/a>,\u00a0<span style=\"color: 888888;\">Lutan Zhao, Peinan Li, Rui Hou, Michael Huang, Peng Liu, Lixin Zhang, and Dan Meng;\u00a0<\/span><i>IEEE Transactions on Computers<\/i> 70(7):963-978, July, 2021 <strong>(TC&#8217;21)<\/strong><\/li>\n<li><a href=\"https:\/\/ieeexplore.ieee.org\/document\/9407038\"><strong>BRIM: Bistable Resistively-Coupled Ising Machine<\/strong><\/a>, Richard Afoakwa, Yiqiao Zhang, Uday Kumar Reddy Vengalam, Zeljko Ignjatovic, and Michael Huang, <i>Proceedings of the 27<sup>th<\/sup>International Symposium on High-Performance Computer Architecture<\/i>, Feb.\/Mar. 2021 <strong>(HPCA&#8217;21)<\/strong><\/li>\n<li><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/pact19.pdf\"><b>To Stack or Not to Stack<\/b><\/a>,\u00a0<span style=\"color: 888888;\">Richard Afoakwa, Lejie Lu, Hui Wu, and Michael Huang<\/span>,<i>Proceedings of the 28<sup><small>th<\/small><\/sup> International Conference on Parallel Architecture and Compilation Techniques<\/i>, Sep. 2019<\/li>\n<li><a href=\"https:\/\/ieeexplore.ieee.org\/document\/8824834\"><b>Concurrent Multipoint-to-Multipoint Communication on Interposer Channels<\/b><\/a>,\u00a0<span style=\"color: 888888;\">Lejie Lu, Richard Afoakwa, Michael Huang, and Hui Wu<\/span>, <i>Proceedings of the 2019 International Symposium on Low Power Electronics and Design<\/i>, July 2019<\/li>\n<li><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/asplos19.pdf\"><strong>Bootstrapping: Using SMT Hardware to Improve Single-Thread Performance<\/strong><\/a>, Sushant Kondguli and Michael Huang, <i>Proceedings of the 24<sup>th<\/sup> International Conference on Architectural Support for Programming Languages and Operating Systems<\/i>, Apr. 2019 <strong>(ASPLOS&#8217;19)<\/strong><\/li>\n<li><b><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/hpca19.pdf\">R3-DLA (Reduce, Reuse, Recycle):<\/a> A More Efficient Approach to Decoupled Look-Ahead Architectures<\/b>, <span style=\"color: 888888;\">Sushant Kondguli and Michael Huang<\/span>, <i>Proceedings of the 25<sup><small>th<\/small><\/sup>International Symposium on High-Performance Computer Architecture<\/i>, Feb. 2019 <strong>(HPCA&#8217;19)<\/strong><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/isca18.pdf\"><strong>Division of Labor: A More Effective Approach to Prefetching<\/strong><\/a>,\u00a0Sushant Kondguli and Michael Huang,\u00a0<em>Proceedings of the 45<\/em><em><sup>th<\/sup><\/em><em>\u00a0International Symposium on Computer Architecture<\/em>, June 2018 <strong>(ISCA&#8217;18)<\/strong><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/doi.org\/10.1145\/3170433\"><strong>A Case for a More Effective, Power-Efficient Turbo Boosting<\/strong><\/a>,\u00a0Sushant Kondguli and Michael Huang,\u00a0<em>ACM Transactions on Architecture and Code Optimization<\/em>, 15(1):5:1-5:22, Mar 2018<\/li>\n<li style=\"font-weight: 400;\"><a href=\"http:\/\/ieeexplore.ieee.org\/document\/8119237\/\"><strong>T2: A Highly Accurate and Energy Efficient Stride Prefetcher<\/strong><\/a>,\u00a0Sushant Kondguli and Michael Huang,\u00a0<em>Proceedings of the International Conference on Computer Design<\/em>, Nov 2017<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/isca17.pdf\"><strong>Redundant Memory Array Architecture for Efficient Selective Protection<\/strong><\/a>,\u00a0Ruohuang Zheng and Michael Huang,\u00a0<em>Proceedings of the 44<\/em><em><sup>th<\/sup><\/em><em>\u00a0International Symposium on Computer Architecture<\/em>, June 2017 <strong>(ISCA&#8217;17)<\/strong><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/hpca16.pdf\"><strong>Venice: Exploring Server Architectures for Effective Resource Sharing<\/strong><\/a>,\u00a0Jianbo Dong, Rui Hou, Michael Huang, Tao Jiang, Boyan Zhao, Sally A. McKee, Haibin Wang, Xiaosong Cui, and Lixin Zhang,\u00a0<em>Proceedings of the 22<\/em><em><sup>nd<\/sup><\/em><em>\u00a0International Symposium on High-Performance Computer Architecture<\/em>, Mar. 2016 <strong>(HPCA&#8217;16)<\/strong><\/li>\n<li style=\"font-weight: 400;\"><strong><a href=\"http:\/\/ieeexplore.ieee.org\/xpl\/articleDetails.jsp?arnumber=7110590\">Building Expressive and Area-Efficient Directories with Hybrid Representation<\/a> <a href=\"http:\/\/ieeexplore.ieee.org\/xpl\/articleDetails.jsp?arnumber=7110590\">and Adaptive Multi-granular Tracking<\/a><\/strong>,\u00a0Peng Liu, Lei Fang, Michael Huang, and Qi Hu,<em>IEEE Transactions on Computers<\/em>\u00a02015<\/li>\n<li style=\"font-weight: 400;\"><strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/hpca14.pdf\">Accelerating Decoupled Look-ahead via Weak Dependence Removal:<\/a> A Metaheuristic Approach<\/strong>,\u00a0Raj Parihar and Michael Huang,\u00a0<em>Proceedings of the 20<\/em><em><sup>th<\/sup><\/em><em>\u00a0International Symposium on High-Performance Computer Architecture<\/em>, Feb. 2014 <strong>(HPCA&#8217;14)<\/strong><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/pact13.pdf\"><strong>Building Expressive, Space-Efficient Coherence Directories<\/strong><\/a>,\u00a0Lei Fang, Peng Liu, Qi Hu, Michael Huang, and Guofan Jiang,\u00a0<em>Proceedings of International Conference on Parallel Architectures and Compilation Techniques<\/em>, Sep. 2013<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/isca12.pdf\"><strong>Enhancing Effective Throughput for Transmission Line-Based Bus<\/strong><\/a>,\u00a0Aaron Carpenter, Jianyun Hu, Ovunc Kocabas, Michael Huang, and Hui Wu,\u00a0<em>Proceedings of the 39<\/em><em><sup>th<\/sup><\/em><em>International Symposium on Computer Architecture<\/em>, Jun. 2012 <strong>(ISCA&#8217;12)<\/strong><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/jetcas12.pdf\"><strong>Using Transmission Lines for Global On-Chip Communication<\/strong><\/a>,\u00a0Aaron Carpenter, Jianyun Hu, Jie Xu, Michael Huang, Hui Wu, and Peng Liu,\u00a0<em>Journal for Emerging and Selected Topics in Circuits and Systems\u00a0<\/em>2(2):183-193, Jun. 2012.<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/oe12.pdf\"><strong>3-D Integrated Heterogeneous Intra-Chip Free-Space Optical Interconnect<\/strong><\/a>,\u00a0Berkehan Ciftcioglu, Rebecca Berman, Shang Wang, Jianyun Hu, Ioannis Savidis, Manish Jain, Duncan Moore, Michael Huang, Eby G. Friedman, Gary Wicks, and Hui Wu\u00a0,\u00a0<em>Optical Express<\/em>, 20(4):4331-4345, Feb. 2012<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/ieeeted12.pdf\"><strong>Nanospintronics Based on Magnetologic Gates<\/strong><\/a>,\u00a0Hanan Dery, Hui Wu, Berkehan Ciftcioglu, Michael Huang, Yang Song, Roland Kawakami, Jing Shi, Ilya Krivorotov, Igor Zutic, and Lu J. Sham,\u00a0<em>IEEE Transactions on Electron Devices,\u00a0<\/em>59(1):259-262, Jan. 2012<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/pact11.pdf\"><strong>Speculative Parallelization in Decoupled Look-ahead<\/strong><\/a>,\u00a0Alok Garg, Raj Parihar, and Michael Huang,\u00a0<em>Proceedings of Int&#8217;l Conference on Parallel Architectures and Compilation Techniques<\/em>, Oct. 2011<\/li>\n<li style=\"font-weight: 400;\"><strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/pact11b.pdf\">POPS: Coherence Protocol Optimization for both Private and Shared Data<\/a><\/strong>,\u00a0Hemayet Hossain, Sandhya Dwarkadas, and Michael Huang,\u00a0<em>Proceedings of Int&#8217;l Conference on <\/em><em>Parallel Architectures and Compilation Techniques<\/em>, Oct. 2011<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/islped11.pdf\"><strong>A Design Space Exploration for of Transmission-Line Links for On-Chip Interconnect<\/strong><\/a>,\u00a0Aaron Carpenter, Jianyun Hu, Michael Huang, Hui Wu, and Peng Liu,\u00a0<em>Proceedings of the International Symposium on Low Power Electronics and Design<\/em>, Aug. 2011<\/li>\n<li style=\"font-weight: 400;\"><strong><a href=\"http:\/\/dl.acm.org\/authorize?445196\">A Case for Globally-Shared-Medium On-Chip Interconnect<\/a><\/strong>,\u00a0Aaron Carpenter, Jianyun Hu, Jie Xu, Michael Huang, and Hui Wu,\u00a0<em>Proceedings of the 38<\/em><em><sup>th<\/sup><\/em><em>\u00a0International Symposium on Computer Architecture<\/em>, Jun. 2011 <strong>(ISCA&#8217;11)<\/strong><\/li>\n<li style=\"font-weight: 400;\"><a href=\"http:\/\/ieeexplore.ieee.org\/stamp\/stamp.jsp?tp=&amp;arnumber=5640649\"><strong>A 3-D Integrated Intrachip Free-Space Optical Interconnect for Many-Core Chips<\/strong><\/a>,\u00a0Berkehan Ciftcioglu, Rebecca Berman, Jian Zhang, Zach Darling, Shang Wang, Jianyu Hu, Jing Xue, Alok Garg, Manish Jain, Ioannis Savidis, Duncan Moore, Michael Huang, Eby Friedman, Gary Wicks, and Hui Wu,\u00a0<em>IEEE Photonics Technology Letters<\/em>, 23(3):164-166, Feb. 2011<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/hpca11.pdf\"><strong>Efficient Data Streaming with On-chip Accelerators: Opportunities and Challenges<\/strong><\/a>,\u00a0Rui Hou, Lixin Zhang, Michael C. Huang, Kun Wang, Hubertus Franke, Yi Ge, and Xiaotao Chang,\u00a0<em>Proceedings of the 17<\/em><em><sup>th<\/sup><\/em><em>\u00a0International Symposium on High-Performance Computer Architecture<\/em>, Feb. 2011 <strong>(HPCA&#8217;11)<\/strong><\/li>\n<li style=\"font-weight: 400;\"><strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/jcp11.pdf\">Particle-in-cell simulations with charge-conserving current deposition<\/a> on graphic processing units<\/strong>,\u00a0Xianglong Kong, Michael Huang, Chuang Ren and Viktor Decyk,\u00a0<em>Journal of Computational Physics<\/em>, 230(4):1676-1685, Feb. 2011<\/li>\n<li style=\"font-weight: 400;\"><strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/usenix10.pdf\">A Realistic Evaluation of Memory Hardware Errors and Software System<\/a> <a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/usenix10.pdf\">Susceptibility<\/a><\/strong>,\u00a0Xin Li, Michael Huang, Kai Shen, and Lingkun Chu,\u00a0<em>Proceedings of the 2010 USENIX Annual Technical Conference<\/em>, Jun. 2010<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/isca10.pdf\"><strong>An Intra-Chip Free-Space Optical Interconnect<\/strong><\/a>,\u00a0Jing Xue, Alok Garg, Berkehan Ciftcioglu, Shang Wang, Jianyun Hu, Ioannis Savidis, Manish Jain, Peng Liu, Michael Huang, Hui Wu, Eby G. Friedman, Gary Wicks, Duncan Moore,\u00a0<em>Proceedings of the 37<\/em><em><sup>th<\/sup><\/em><em>International Symposium on Computer Architectures<\/em>, Jun. 2010 <strong>(ISCA&#8217;10) <\/strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/isca10tr.pdf\">Extended technical report<\/a><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/pact09.pdf\"><strong>DDCache: Decoupled and Delegable Cache Data and Metadata<\/strong><\/a>,\u00a0Hemayet Hossain, Sandhya Dwarkadas, and Michael Huang,\u00a0<em>Proceedings of the 18<\/em><em><sup>th<\/sup><\/em><em>\u00a0International Conference on Parallel Architectures and Compilation Techniques<\/em>, Sep. 2009<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/tc09.pdf\"><strong>Replacing Associative Load Queues: A Timing-Centric Approach<\/strong><\/a>,\u00a0Fernando Castro, Regana Noor, Alok Garg, Dani Chaver, Michael Huang, Luis Pinuel, Manuel Prieto, and Franciso Tirado,\u00a0<em>IEEE Transactions on Computers<\/em>, 58(4):496-511, Apr. 2009<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/isqed09.pdf\"><strong>Variation-Tolerant Hierarchical Voltage Monitoring Circuit for Soft Error Detection<\/strong><\/a>,\u00a0Ashay Narsale and Michael Huang,\u00a0 <em>Proceedings of the 10<\/em><em><sup>th<\/sup><\/em><em>\u00a0International Symposium on Quality Electronic Design<\/em>, Mar. 2009<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/micro08.pdf\"><strong>A Performance-Correctness Explicitly-Decoupled Architecture<\/strong><\/a>,\u00a0Alok Garg and Michael Huang,\u00a0 <em>Proceedings of the 41<\/em><em><sup>st<\/sup><\/em><em>\u00a0International Symposium on Microarchitecture<\/em>, pp. 306-317, Nov. 2008 <strong>(MICRO&#8217;08) <\/strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/micro08tr.pdf\">Extended technical report<\/a><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/pact08.pdf\"><strong>Improving Support for Locality and Fine-Grain Sharing in Chip Multiprocessors<\/strong><\/a>, Hemayet Hossain, Sandhya Dwarkadas, and Michael Huang,\u00a0<em>Proceedings of the 17<\/em><em><sup>th<\/sup><\/em><em>International Conference on Parallel Architectures and Compilation Techniques<\/em>, Oct. 2008<\/li>\n<li style=\"font-weight: 400;\"><strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/tvlsi08.pdf\">Injection-Locked Clocking: A Low-Power Clock Distribution Scheme for<\/a> <a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/tvlsi08.pdf\">High-Performance Microprocessors<\/a><\/strong>,\u00a0Lin Zhang, Aaron Carpenter, Berkehan Ciftcioglu, Alok Garg, Michael Huang, and Hui Wu,\u00a0<em>IEEE Transactions on Very Large Scale Integration (VLSI) Systems<\/em>, 16(9):1251-1256, Sep. 2008 <a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/ilc_tr.pdf\">Extended technical report<\/a><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/hpca08.pdf\"><strong>Supporting Highly-Decoupled Thread-Level Redundancy for Parallel Programs<\/strong><\/a>,\u00a0M. Wasiur Rashid and Michael Huang,\u00a0<em>Proceedings of the International Symposium on High-Performance Computer Architecture<\/em>, Feb. 2008, pp. 393-404 <strong>(HPCA&#8217;08)<\/strong><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/hotdep07.pdf\"><strong>An Empirical Study of Memory Hardware Errors in a Server Farm<\/strong><\/a>,\u00a0Xin Li, Michael Huang, Kai Shen, and Lingkun Chu,\u00a0<em>Proceedings of the 3<\/em><em><sup>rd<\/sup><\/em><em>\u00a0Workshop on Hot Topics in System Dependability<\/em>, June 2007<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/usenix07.pdf\"><strong>A Memory Soft Error Measurement on Production Systems<\/strong><\/a>,\u00a0Xin Li, Kai Shen, Michael Huang, and Lingkun Chu,\u00a0<em>Proceedings of the 2007 USENIX Annual Technical Conference<\/em>, June. 2007<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/micro06.pdf\"><strong>DMDC: Delayed Memory Dependence Checking through Age-Based Filtering<\/strong><\/a>, Fernando Castro, Luis Pinuel, Dani Chaver, Manuel Prieto, Michael Huang, and Francisco Tirado,\u00a0<em>Proceedings of the 38<\/em><em><sup>th<\/sup><\/em><em>\u00a0International Symposium on Microarchitecture<\/em>, Dec. 2006, pp. 297-306 <strong>(MICRO&#8217;06)<\/strong><\/li>\n<li style=\"font-weight: 400;\"><strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/islped06.pdf\">Substituting Associative Load Queue with Simple Hash Table in Out-of-Order<\/a> <a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/islped06.html\">Microprocessors<\/a><\/strong>,\u00a0Alok Garg, Fernando Castro, Michael Huang, Luis Pinuel, Dani Chaver, and Manuel Prieto,\u00a0<em>Proceedings of the International Symposium on Low-Power Electronics and Design<\/em>, Oct. 2006, pp. 268-273<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/cicc06.pdf\"><strong>Injection-Locked Clocking: A New GHz Clock Distribution Scheme<\/strong><\/a>,\u00a0Lin Zhang, Berkehan Ciftcioglu, Michael Huang, Hui Wu,\u00a0<em>Proceedings of the IEEE Custom Integrated Circuits Conference<\/em>, Sep. 2006<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/pact06.pdf\"><strong>SEED: Scalable, Efficient Enforcement of Dependences<\/strong><\/a>,\u00a0Francisco J. Mesa-Martinez, Michael Huang, and Jose Renau,\u00a0<em>Proceedings of the 15<\/em><em><sup>th<\/sup><\/em><em>\u00a0International Conference on Parallel Architectures and Compilation Techniques<\/em>, Sep. 2006, pp. 254&#8211;264<\/li>\n<li style=\"font-weight: 400;\"><strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/isca06.pdf\">Slackened Memory Dependence Enforcement: Combining Opportunistic Forwarding<\/a> <a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/isca06.pdf\">with Decoupled Verification<\/a><\/strong>,\u00a0Alok Garg, M. Wasiur Rashid, and Michael Huang,<em>Proceedings of the International Symposium on Computer Architecture<\/em>, Jun. 2006, pp. 142-153 <strong>(ISCA&#8217;06) <\/strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/isca06tr.pdf\">Extended technical report<\/a><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/doi.org\/10.1166\/jolpe.2006.004\"><strong>A Load-Store Queue Design based on Predictive State Filtering<\/strong><\/a>,\u00a0Fernando Castro, Daniel Chaver, Luis Pinuel, Manuel Prieto, Michael Huang, and Francisco Tirado,\u00a0<em>Journal of Low Power Electronics<\/em>\u00a02(1):27-36, Apr. 2006<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/hpca06.pdf\"><strong>Software-Hardware Cooperative Memory Disambiguation<\/strong><\/a>,\u00a0Ruke Huang, Alok Garg, and Michael Huang,\u00a0<em>Proceedings of the International Symposium on High-Performance Computer Architecture<\/em>, Feb. 2006, pp. 248-257 <strong>(HPCA&#8217;06) <\/strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/hpca06tr.pdf\">Extended technical report<\/a><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/ieeemicro05.pdf\"><strong>Power Efficient Error Tolerance in Chip Multi-Processors<\/strong><\/a>,\u00a0M. Wasiur Rashid, Ed Tan, Michael Huang, and David Albonesi,\u00a0<em>IEEE Micro<\/em>\u00a025(6):60-70, Nov.\/Dec. 2005 Special Issue on Reliability-Aware Design<\/li>\n<li style=\"font-weight: 400;\"><strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/iccd05.pdf\">Load-Store Queue Management: an Energy Efficient Design based on a State<\/a> <a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/iccd05.pdf\">Filtering Mechanism<\/a><\/strong>,\u00a0Fernando Castro, Daniel Chaver, Luis Pi\u00f1uel, Manuel Prieto, Michael Huang, and Francisco Tirado,\u00a0<em>Proceedings of the 2005 IEEE International Conference on Computer Design<\/em>, Oct. 2005, pp. 617-624<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/patmos05.pdf\"><strong>A Power-Efficient and Scalable Load-Store Queue Design<\/strong><\/a>,\u00a0Fernando Castro, Daniel Chaver, Luis Pi\u00f1uel, Manuel Prieto, Michael Huang, and Francisco Tirado,\u00a0<em>Proceedings of the International Workshop on Power And Timing Modeling, Optimization and Simulation\u00a0<\/em>, Sep. 2005, appears in\u00a0<em>Lecture Notes in Computer Science<\/em>\u00a0<strong>(LNCS)<\/strong>\u00a0Vol. 2236(8):1-9, 2005 by Springer Verlag<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/pact05.pdf\"><strong>Exploiting Coarse-Grain Verification Parallelism for Power-Efficient Fault Tolerance<\/strong><\/a>, M. Wasiur Rashid, Ed Tan, Michael Huang, and David Albonesi,\u00a0<em>Proceedings of the 14<\/em><em><sup>th<\/sup><\/em><em>International Conference on Parallel Architectures and Compilation Techniques,<\/em>\u00a0Sep. 2005, pp. 315-325<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/islped05.pdf\"><strong>Energy-Aware Fetch Mechanism: Trace Cache and BTB Customization<\/strong><\/a>,\u00a0Daniel Chaver, Miguel Rojas, Luis Pi\u00f1uel, Manuel Prieto, Francisco Tirado, and Michael Huang,\u00a0<em>Proceedings of the International Symposium on Low-Power Electronics and Design<\/em>, Aug. 2005, pp. 42-47<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/ics04.pdf\"><strong>EXPERT: Expedited Simulation Exploiting Program Behavior Repetition<\/strong><\/a>,\u00a0Wei Liu and Michael Huang\u00a0<em>Proceedings of the International Conference on Supercomputing<\/em>, Jun. 2004, pp. 126-135<\/li>\n<li style=\"font-weight: 400;\"><strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/ispass04.pdf\">Dynamically Reducing Pressure on the Physical Register File through Simple<\/a> <a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/ispass04.pdf\">Register Sharing<\/a> (Winner of Best Paper Award)<\/strong>,\u00a0Liem Tran, Nick Nelson, Fung Ngai, Steve Dropsho, and Michael Huang\u00a0<em>Proceedings of the International Symposium on Performance Analysis of Systems and Software<\/em>, Mar. 2004, pp. 78-87<\/li>\n<li style=\"font-weight: 400;\"><strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/hpca04.pdf\">The Thrifty Barrier: Energy-Efficient Synchronization in Shared-Memory<\/a> <a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/hpca04.pdf\">Multiprocessors<\/a><\/strong>,\u00a0Jian Li, Jos\u00e9 Mart\u00ednez, and Michael Huang,\u00a0<em>Proceedings of the International Symposium on High-Performance Computer Architecture<\/em>, Feb. 2004, pp. 14-23 <strong>(HPCA&#8217;04)<\/strong><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/ieeecomputer03.pdf\"><strong>Dynamically Tuning Processor Resources with Adaptive Processing<\/strong><\/a>,\u00a0David Albonesi, Rajeev Balasubramonian, Steven Dropsho, Sandhya Dwarkadas, Eby Friedman, Michael Huang, Volkan Kursun, Grigorios Magklis, Michael Scott, Greg Semeraro, Pradip Bose, Alper Buyuktosunoglu, Peter Cook, and Stanley Schuster,\u00a0<em>IEEE Computer<\/em>\u00a036(12):49-58, Dec. 2003 Special issue on Power-Aware and Temperature-Aware Computing<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/ieeemicro03.pdf\"><strong>Customizing the Branch Predictor to Reduce Complexity and Energy Consumption<\/strong><\/a>, Michael Huang, Daniel Chaver, Luis Pi\u00f1uel, Manuel Prieto, and Francisco Tirado,\u00a0<em>IEEE Micro<\/em>\u00a023(5):12-25, Sep.\/Oct. 2003 Special issue on Power and Complexity Aware Design<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/islped03.pdf\"><strong>Branch Prediction On Demand: an Energy-Efficient Solution<\/strong><\/a>,\u00a0Daniel Chaver, Luis Pi\u00f1uel, Manuel Prieto, Francisco Tirado, and Michael Huang,\u00a0<em>Proceedings of the International Symposium on Low-Power Electronics and Design<\/em>, Aug. 2003, pp. 390 &#8211; 395<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/isca03.pdf\"><strong>Positional Processor Adaptation: Application to Energy Reduction<\/strong><\/a>,\u00a0Michael Huang, Jose Renau, and Josep Torrellas,\u00a0<em>Proceedings of the 30<\/em><em><sup>th<\/sup><\/em><em>\u00a0International Symposium on Computer Architecture<\/em>, Jun. 2003, pp. 157-168<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/micro02.pdf\"><strong>Cherry: Checkpointed Early Resource Recycling in Out-of-order Microprocessors<\/strong><\/a>, Jos\u00e9 Mart\u00ednez, Jose Renau, Michael Huang, Milos Prvulovic, and Josep Torrellas,\u00a0<em>Proceedings of the 35<\/em><em><sup>th<\/sup><\/em><em>\u00a0International Symposium on Microarchitecture<\/em>, Nov. 2002, pp. 3-14 <strong>(MICRO&#8217;02)<\/strong><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/islped02.pdf\"><strong>Energy-Efficient Hybrid Wakeup Logic<\/strong><\/a>,\u00a0Michael Huang, Jose Renau, and Josep Torrellas,\u00a0\u00a0<em>Proceedings of the International Symposium on Low-Power Electronics and Design<\/em>, Aug. 2002, pp. 196-201<\/li>\n<li style=\"font-weight: 400;\"><strong><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/jilp01.pdf\">The Design of DEETM: a Framework for Dynamic Energy Efficiency and Temperature<\/a> <a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/jilp01.pdf\">Management<\/a><\/strong>,\u00a0Michael Huang, Jose Renau, Seung-Moon Yoo, and Josep Torrellas,\u00a0\u00a0<em>Journal of Instruction-Level Parallelism<\/em>, Vol. 3, 2002<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/fddo01.pdf\"><strong>Profile-Based Energy Reduction in High-Performance Processors<\/strong><\/a>,\u00a0Michael Huang, Jose Renau, Josep Torrellas,\u00a0<em>Proceedings of the 4<\/em><em><sup>th<\/sup><\/em><em>\u00a0ACM Workshop on Feedback-Directed and Dynamic Optimization<\/em>, Dec. 2001<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/islped01.pdf\"><strong>L1 Data Cache Decomposition for Energy Efficiency<\/strong><\/a>,\u00a0Michael Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas,\u00a0<em>Proceedings of the International Symposium on Low-Power Electronics and Design<\/em>, Aug. 2001, pp. 10-15<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/micro00.pdf\"><strong>A Framework for Dynamic Energy Efficiency and Temperature Management<\/strong><\/a>,\u00a0Michael Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas,\u00a0<em>Proceedings of the 33<\/em><em><sup>rd<\/sup><\/em><em>\u00a0International Symposium on Microarchitecture<\/em>, Dec. 2000, pp. 202-213 <strong>(MICRO&#8217;00)<\/strong><\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/ims00.pdf\"><strong>Energy\/Performance Design of Memory Hierarchies for Processor-in-Memory Chips<\/strong><\/a>, Michael Huang, Jose Renau, Seung-Moon Yoo, Josep Torrellas,\u00a0<em>Proceedings of the 2<\/em><em><sup>nd<\/sup><\/em><em>Workshop on Intelligent Memory Systems<\/em>, Nov. 2000. Also appears in\u00a0<em>Lecture Notes in Computer Science<\/em>\u00a0<strong>(LNCS)<\/strong>\u00a0Vol. 2107(VIII):152-159 by Springer Verlag<\/li>\n<li style=\"font-weight: 400;\"><a href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/wp-content\/uploads\/2023\/03\/iccd99.pdf\"><strong>FlexRAM: Toward an Advanced Intelligent Memory System<\/strong><\/a>, <strong>(Winner of High-Impact Paper Award)<\/strong> Yi Kang, Michael Huang, Seung-Moon Yoo, Diana Keen, Zhenzhou Ge, Vinh Lam, Pratap Pattnaik and Josep Torrellas,\u00a0\u00a0<em>Proceedings of the 1999 IEEE International Conference on Computer Design<\/em>, Oct. 1999, pp. 192-201<\/li>\n<\/ul>\n","protected":false},"excerpt":{"rendered":"<p>SLAM: Extending the Reach of Ising Machine Advantage, M. Burns , Z. Azad, Y. Liu , T. Geng, H. Wu, and M. Huang, to appear in IEEE Trans. Computers, 2025&hellip;<\/p>\n","protected":false},"author":16,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":{"footnotes":""},"class_list":["post-396","page","type-page","status-publish","hentry"],"acf":[],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.5 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>Publications - Michael Huang<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.hajim.rochester.edu\/ece\/sites\/michaelhuang\/publications\/\" \/>\n<meta property=\"og:locale\" content=\"en_US\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Publications - Michael Huang\" \/>\n<meta property=\"og:description\" content=\"SLAM: Extending the Reach of Ising Machine Advantage, M. Burns , Z. Azad, Y. Liu , T. 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