Department of Electrical and Computer Engineering Ph.D. Public Defense
Integrated Silicon Photonic Optical Phased Array for Free-Space Optical Interconnect
Francis A. Smith
Supervised by Professor Hui Wu
Tuesday, August 20, 2019
Computer Studies Building, Room 426
Integrated optical phased arrays (OPAs) are rapidly becoming one of the most promising technologies for future light detection and ranging (LIDAR) applications, thanks to their advantages in size, weight, and power consumption as com- pared to conventional solutions. Recently, a 1024-element integrated OPA has been implemented using an SOI CMOS technology. Large-scale OPA s can leverage high integration densities of electronic-photonic integrated circuit technology to generate finer beamwidth, better beamsteering control, and higher optical power. Free-space optical interconnects (FSOI) are emerging as an attractive alternative to planar electrical interconnects for inter- and intra-chip data communications. By leveraging the third dimension above the chip surface, FSOI solutions can offer higher bandwidth density compared to on-chip, waveguide-based solutions. Through 3-D integration, low cost, CMOS-compatible, silicon photonic FSOI systems for high performance data center communications are within reach. The versatility of integrated OPAs can address the accurate alignment requirements of such systems to ensure robust link performance.
At optical frequencies, the conventional design of phased arrays relies on the Finite-Difference Time Domain (FDTD) method. The FDTD method explicitly calculates the evolution of the array pattern from a fi discretized spatial representation of the entire array over a short time scale. Thus, computation accuracy is directly traded for simulation time. In addition, the modeling techniques to manage this tradeoff do not accommodate asymmetric arrays or allow array analysis at the system level.
In this work, I propose an OPA circuit design based on the synthesis method, which significantly relaxes the computational cost, time, and accuracy tradeoffs of OPA design at optical frequencies by using the radiation pattern of a single emitter element to synthesize that of the whole array. Instead of modeling an entire emitter array using the FDTD method, the synthesis approach requires only a single emitter to be simulated using 3-D FDTD. A design flow based on the proposed phased array synthesis allows accurate and robust modeling of arbitrary 1-D and 2-D OPAs, and enables optimization of device parameters and array coefficients across the device and system levels.
The synthesis method is used to develop an OPA chip prototype in a standard silicon photonic technology. A diagonally asymmetric array geometry is designed to potentially increase orthogonal free-space optical beam steering range com- pared to conventional rectangular grid OPA geometries. A technique is developed to leverage the natural static bias of the optical waveguide channels to reduce the power required for beamsteering control. Further, multi-function optical beam control is explored through subarray beam splitting. The fabricated chip prototype is packaged and tested in a custom free-space imaging test bench. We use a closed-loop, component-to-system optimization in both circuit design and testing. The measured beamwidth of the sparse OPA is 2.13o in φ and 0.67o in θ. The measured grating lobe free beamsteering range in φ is 20o (±10o), and in θ is 24o (±12o). The measurement results agree with the simulations and are successfully verified by the design.