Process-induced Strain Engineering for van der Waals Heterostructures

Tara Peña

Supervised by Stephen Wu

523 Computer Studies Building

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Meeting ID: 973 5363 8313
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Over the past five decades, conventional computing advancements have relied heavily on modifying the transistor's architecture and size. As the physical limitations of the transistor are quickly being reached, there is a need to search for new material systems and emerging technologies to continue achieving higher performance and energy-efficient computing standards. Van der Waals (vdW) bonded materials offer a promising platform to potentially complement or supplant existing technology, due to their exceptional (opto)electronic properties that already exist with atomic thickness. Moreover, vdW materials have incredible flexibility, high elastic limits, and an arsenal of strain-tunable materials’ properties. Therefore, strain is a desirable (necessary) perturbation to consider and engineer for future vdW-based device structures. In this thesis, we examine how to translate the similar process-induced strain engineering techniques used in industrial silicon nanofabrication processes to vdW heterostructures.