ECE Seminar Lecture Series

Research Challenges in High Performance Integrated Systems

Eby G. Friedman

Wednesday, March 31, 2021
Noon–1 p.m. Passcode: 066310








The objective of this presentation is to provide an overview of the different areas of active research in the high performance integrated circuit design laboratory. Each of these topics considers different aspects of the systems integration process, with a focus on physical and circuit level aspects. Emphasis is placed on those fundamental challenges in delivering performance to high speed, high complexity heterogeneous integrated systems. Technologies range from deeply scaled CMOS to emerging devices and circuits such as spintronic, superconductive, and photonic behaviors to systems platforms such as three-dimensional integration. 

Delivering high quality power to on-chip circuitry with low energy loss is a fundamental requirement of all modern integrated circuits. Power conversion and regulation need to be efficiently managed to supply high quality power with minimal energy loss within multiple on-chip power domains. An integrated system of hundreds of power regulators with many millions of decoupling capacitors is required, distributing the power locally to many billions of on-chip loads. Circuits, algorithms, and design methodologies are being developed to fundamentally change the manner in which power is delivered through the package and onto the integrated circuit.   

Three-dimensional (3-D) integration is changing the path for device scaling, supporting the delivery of multi-faceted heterogeneous systems. Techniques and methodologies are under development to better design, model, architect, and build 3-D systems. Several test circuits have been developed to evaluate some of the key issues in 3-D systems integration such as synchronization, power delivery, and thermal effects. 

Spintronic circuits have the potential to enhance CMOS in several dimensions, particularly as non-volatile memory and novel non-von Neumann structures. Several models and circuit topologies will be described and placed within a CMOS perspective. 

The energy expended in server farms has become an issue of seminal significance. CMOS simply expends too much energy to satisfy expected needs of cloud computing. An ultra-low energy technology is needed. One possible technology is superconductive single flux quantum circuits. This technology will be briefly reviewed, and novel design methodologies, algorithms, and circuit structures will be described to support the development of large scale Josephson junction based integrated systems. 


Eby G. Friedman received the B.S. degree in electrical engineering from Lafayette College and the M.S. and Ph.D. degrees in electrical engineering from the University of California at Irvine. He was with Hughes Aircraft Company for a dozen years where he was responsible for the design and test of high performance digital and analog ICs. He has been with the Department of Electrical and Computer Engineering, University of Rochester since 1991, where he is a Distinguished Professor and the Director of the High Performance VLSI/IC Design and Analysis Laboratory. He is also a Visiting Professor with the Technion—Israel Institute of Technology. He has authored over 500 papers and book chapters, 22 patents, and authored or edited 19 books in the fields of high speed and low power CMOS design techniques, 3-D design methodologies, high speed interconnect, superconductive circuits, and the theory and application of synchronous clock and power distribution networks. His current research and teaching interests include high performance synchronous digital and mixed-signal circuit design and analysis with application to high speed portable processors, low power wireless communications, and server farms. 

Dr. Friedman is a recipient of the IEEE Circuits and Systems Mac Van Valkenburg Award, IEEE Circuits and Systems Charles A. Desoer Technical Achievement Award, the University of Rochester Graduate Teaching Award, and the College of Engineering Teaching Excellence Award. He is the Editor-in-Chief of the Microelectronics Journal, and was previously the Editor-in-Chief and Chair of the steering committee of the IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Regional Editor of the Journal of Circuits, Systems and Computers, an editorial board member of numerous journals, and a program and technical chair of several IEEE conferences. He is an IEEE Fellow, Senior Fulbright Fellow, National Sun Yat-sen University Honorary Chair Professor, and an inaugural member of the UC Irvine Engineering Hall of Fame.